Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems. / Semal, Benjamin; Markantonakis, Konstantinos; Akram, Raja Naeem; Kalbantner, Jan.

2020. Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia.

Research output: Contribution to conferencePaper

Forthcoming

Standard

Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems. / Semal, Benjamin; Markantonakis, Konstantinos; Akram, Raja Naeem; Kalbantner, Jan.

2020. Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia.

Research output: Contribution to conferencePaper

Harvard

Semal, B, Markantonakis, K, Akram, RN & Kalbantner, J 2020, 'Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems', Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia, 26/05/20 - 28/05/20.

APA

Semal, B., Markantonakis, K., Akram, R. N., & Kalbantner, J. (Accepted/In press). Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems. Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia.

Vancouver

Semal B, Markantonakis K, Akram RN, Kalbantner J. Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems. 2020. Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia.

Author

Semal, Benjamin ; Markantonakis, Konstantinos ; Akram, Raja Naeem ; Kalbantner, Jan. / Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems. Paper presented at 35th International Conference on ICT Systems Security and Privacy Protection, Maribor, Slovenia.

BibTeX

@conference{b33a68afea494313b0b17e0d83e2c37f,
title = "Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems",
abstract = "Data confidentiality is put at risk on cloud platforms where multiple tenants share the underlying hardware. As multiple workloads are executed concurrently, conflicts in memory resource occur, resulting in observable timing variations during execution. Malicious tenants can intentionally manipulate the hardware platform to devise a covert channel, enabling them to steal the data of co-residing tenants. This paper presents two new microarchitectural covert channel attacks using the memory controller. The first attack allows a privileged adversary (i.e. process) to leak information in a native environment. The second attack is an extension to cross-VM scenarios for unprivileged adversaries. This work is the first instance of leakage channel based on the memory controller. As opposed to previous denial-of-service attacks, we manage to modulate the load on the channel scheduler with accuracy. Both attacks are implemented on cross-core configurations. Furthermore, the cross-VM covert channel is successfully tested across three different Intel microarchitectures. Finally, a comparison against state-of-the-art covert channel attacks is provided, along with a discussion on potential mitigation techniques.",
author = "Benjamin Semal and Konstantinos Markantonakis and Akram, {Raja Naeem} and Jan Kalbantner",
year = "2020",
month = feb
day = "11",
language = "English",
note = "35th International Conference on ICT Systems Security and Privacy Protection, IFIP SEC 2020 ; Conference date: 26-05-2020 Through 28-05-2020",
url = "https://sec2020.um.si/",

}

RIS

TY - CONF

T1 - Leaky Controller: Cross-VM Memory Controller Covert Channel on Multi-Core Systems

AU - Semal, Benjamin

AU - Markantonakis, Konstantinos

AU - Akram, Raja Naeem

AU - Kalbantner, Jan

PY - 2020/2/11

Y1 - 2020/2/11

N2 - Data confidentiality is put at risk on cloud platforms where multiple tenants share the underlying hardware. As multiple workloads are executed concurrently, conflicts in memory resource occur, resulting in observable timing variations during execution. Malicious tenants can intentionally manipulate the hardware platform to devise a covert channel, enabling them to steal the data of co-residing tenants. This paper presents two new microarchitectural covert channel attacks using the memory controller. The first attack allows a privileged adversary (i.e. process) to leak information in a native environment. The second attack is an extension to cross-VM scenarios for unprivileged adversaries. This work is the first instance of leakage channel based on the memory controller. As opposed to previous denial-of-service attacks, we manage to modulate the load on the channel scheduler with accuracy. Both attacks are implemented on cross-core configurations. Furthermore, the cross-VM covert channel is successfully tested across three different Intel microarchitectures. Finally, a comparison against state-of-the-art covert channel attacks is provided, along with a discussion on potential mitigation techniques.

AB - Data confidentiality is put at risk on cloud platforms where multiple tenants share the underlying hardware. As multiple workloads are executed concurrently, conflicts in memory resource occur, resulting in observable timing variations during execution. Malicious tenants can intentionally manipulate the hardware platform to devise a covert channel, enabling them to steal the data of co-residing tenants. This paper presents two new microarchitectural covert channel attacks using the memory controller. The first attack allows a privileged adversary (i.e. process) to leak information in a native environment. The second attack is an extension to cross-VM scenarios for unprivileged adversaries. This work is the first instance of leakage channel based on the memory controller. As opposed to previous denial-of-service attacks, we manage to modulate the load on the channel scheduler with accuracy. Both attacks are implemented on cross-core configurations. Furthermore, the cross-VM covert channel is successfully tested across three different Intel microarchitectures. Finally, a comparison against state-of-the-art covert channel attacks is provided, along with a discussion on potential mitigation techniques.

M3 - Paper

T2 - 35th International Conference on ICT Systems Security and Privacy Protection

Y2 - 26 May 2020 through 28 May 2020

ER -