Analysis of Delays in Converting from a Redundant Representation. / Walter, Colin D.

In: IEE Proc. Computers and Digital Techniques, Vol. 144, No. 4, 01.07.1997, p. 219-221.

Research output: Contribution to journalArticle

Published

Standard

Analysis of Delays in Converting from a Redundant Representation. / Walter, Colin D.

In: IEE Proc. Computers and Digital Techniques, Vol. 144, No. 4, 01.07.1997, p. 219-221.

Research output: Contribution to journalArticle

Harvard

Walter, CD 1997, 'Analysis of Delays in Converting from a Redundant Representation', IEE Proc. Computers and Digital Techniques, vol. 144, no. 4, pp. 219-221.

APA

Walter, C. D. (1997). Analysis of Delays in Converting from a Redundant Representation. IEE Proc. Computers and Digital Techniques, 144(4), 219-221.

Vancouver

Walter CD. Analysis of Delays in Converting from a Redundant Representation. IEE Proc. Computers and Digital Techniques. 1997 Jul 1;144(4):219-221.

Author

Walter, Colin D. / Analysis of Delays in Converting from a Redundant Representation. In: IEE Proc. Computers and Digital Techniques. 1997 ; Vol. 144, No. 4. pp. 219-221.

BibTeX

@article{4d255416d33641f09ce15d32c5242232,
title = "Analysis of Delays in Converting from a Redundant Representation",
author = "Walter, {Colin D.}",
year = "1997",
month = jul
day = "1",
language = "Undefined/Unknown",
volume = "144",
pages = "219--221",
journal = "IEE Proc. Computers and Digital Techniques",
number = "4",

}

RIS

TY - JOUR

T1 - Analysis of Delays in Converting from a Redundant Representation

AU - Walter, Colin D.

PY - 1997/7/1

Y1 - 1997/7/1

M3 - Article

VL - 144

SP - 219

EP - 221

JO - IEE Proc. Computers and Digital Techniques

JF - IEE Proc. Computers and Digital Techniques

IS - 4

ER -