Bit--Serial Modulo Multiplier

Allan Tomlinson

Research output: Contribution to journalArticlepeer-review


A bit-serial modular multiplier is presented which uses a table look-up method to perform modular reduction. Since the clock frequency is independent of word length, this design is most useful when dealing with large integers, and is required by many modern cryptographic system
Original languageUndefined/Unknown
Pages (from-to)1664
Number of pages1
JournalElectronics Letters
Issue number24
Publication statusPublished - 1 Nov 1989

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