Acceleration of Timing-Aware Gate-Level Logic Simulation Through One-Pass GPU Parallelism

Weijie Fang, Yanggeng Fu, Jiaquan Gao, Longkun Guo, Gregory Gutin, Xiaoyan Zhang

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	1-12
Number of pages	12
Journal	IEEE Transactions on Computers
Early online date	13 May 2025
DOIs	https://doi.org/10.1109/TC.2025.3569135
Publication status	E-pub ahead of print - 13 May 2025

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title = "Acceleration of Timing-Aware Gate-Level Logic Simulation Through One-Pass GPU Parallelism",

author = "Weijie Fang and Yanggeng Fu and Jiaquan Gao and Longkun Guo and Gregory Gutin and Xiaoyan Zhang",

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AU - Fang, Weijie

AU - Fu, Yanggeng

AU - Gao, Jiaquan

AU - Guo, Longkun

AU - Gutin, Gregory

AU - Zhang, Xiaoyan

PY - 2025/5/13

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JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

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